
Any-hoo, once I've done the last few wires, I'll try the code I have for reading the card and see how close I got...chances are it'll need lots of tweeking to get it working right.
GETBIT3 macro
stx port ; Clock pulse
sty port ;
cpy port ; if Databit is 0, then Carry clear, else set.
rol
endm
GETBIT macro
stx port ; Clock pulse
sty port ;
asl ; Shift incoming data to make space for new bit
bit port
bmi !skip ; Bmi is reversed
ora #1
!skip
endm
CLOCK PORT
+--+--+
GND | 1| 2| VCC (+5V)
+--+--+
/INT | 3| 4| /SPARE_CS
+--+--+
/RTC_CS | 5| 6| /PWR_BAD
+--+--+
/IORD | 7| 8| /IOWR
+--+--+
A3 | 9|10| A2
+--+--+
A1 |11|12| A0
+--+--+
D7 |13|14| D6
+--+--+
D5 |15|16| D4
+--+--+
D3 |17|18| D2
+--+--+
D1 |19|20| D0
+--+--+
GND |21|22| /RESET
+--+--+
Connection to C64 Expansion Port
---------------------------------
Clock Port Signal | Expansion Port Signal
-----------------------------------------------------
GND <=> GND (22 and Z, not 1 and A)
VCC <=> +5V (2 and 3)
/INT <=> /NMI
A0-A3 <=> A0-A3
D0-D7 <=> D0-D7
/RESET <=> /RESET